x86: Eliminate redundant 3-operand register syntax in itx
x86: Remove identity/adst itx fast paths
Fix MC masks alignment for sizes >= 64 for AVX-512
CLI: Add missing cpumask for VSX
memory sanitizer: mask all CPU flags
Remove 422 check from cdef loop
const correctness in ipred_tmpl.c
x86: Split AVX2 / AVX-512 CDEF into dedicated files
x86: Add cdef_filter_{4,8}x8 AVX-512 (Ice Lake) asm
arm: mc: NEON implementation of emu_edge for 8bpc
arm64: mc: NEON implementation of emu_edge for 16bpc
arm64: mc: NEON implementation of emu_edge for 8bpc
CI: Remove port number from registry URL
CI: style: Allow the name 'David' in connection with copyright
CI: Add debug messages to style checks
x86: add some explanatory comment to wiener_filter_h
Look up __pthread_get_minstack only in glibc
Update a stale comment for dav1d_alloc_aligned()
x86: mc: Skip checks for zero leftext/rightext within the need_left_ext/need_right_ext blocks
Skip loop restoration cache buffer resize for too-small buffers
x86: add SSSE3 versions for filmgrain.fguv_32x32xn[422/444]
x86: use btc instead of xor+test or 32byte alignment in fgy_32x32xn_ssse3
x86: add AVX2 versions for filmgrain.fguv_32x32xn[422/444]
x86: use btc instead of xor+test in fgy_32x32xn_avx2
Align dav1d_resize_filter[]
x86: don't use vptest in SSSE3 version
x86: add SSSE3 version of mc.resize()
x86: add AVX2 version of mc.resize()
checkasm: add test for mc.resize()
Invert src_w/h argument in mc.resize()
Make dav1d_resize_filter[] negative so it fits in int8_t
const correctness in obu.c
meson/x86: add option to disable AVX-512 asm
const correctness in picture.c
Extract sub_h4 out of inner loop
arm64: ipred: Add NEON implementation of ipred for 16 bpc
checkasm: ipred: Test and benchmark FILTER_PRED separately for 10 and 12 bpc
arm: ipred: Prepare for 16 bpc
arm: ipred: Remove stray leftover instructions
arm64: ipred: Integrate aggregation into the first pass of cfl_ac
arm64: ipred: Use rounded shifts instead of a separate addition
arm64: ipred: Do shifts on only half the register width when possible
arm64: ipred: Avoid data dependencies with consecutive dup instructions
arm64: ipred: Remove a superfluous postincrement
x86: add AVX2 SIMD for ipred.cfl_ac[444]
checkasm: add proper restrictions for h/w_pad in ipred.cfl_ac[444/422]
x86: add SSSE3 SIMD for generate_grain_uv_{422,444}
x86: add AVX2 SIMD for generate_grain_uv_{422,444}
const correctness in thread_task
Make insert_border src pointer const
crossfiles: android: Remove misleading comment
crossfiles: android armv7: Target API 16
crossfiles: android: Remove hardcoded c_args
ci: Add android jobs with artifacts on tags
ci: Add android configs
package: Add android crossfiles
Add crosscompile config files for 32, 64-bit Windows and 32-bit Linux
Add a cast to avoid MSVC warning
meson/android: undefine _FILE_OFFSET_BITS if fseeko is not available
Merge fix_mv{_int,}_precision() into get_gmv_2d()
Use union refmvs_pair { mv mv[2]; uint64_t n; } for MV pairs
Rewrite refmvs.c
lib: restructure the internal implementation of the decode API
android/arm: do not use fseeko in library code
headers: partially revert a recent change to Dav1dLogger doxy
CI: Only deploy documentation for master branch
Fix a typo, only need two l!
headers: add missing doxy to some Dav1dSettings fields
headers: split some public fields into separate lines and document them
CLI: Remove additional space
CLI: Remove avx512 from help text
CI: add examples job build
examples: fail when SDL is not found
CI: Add documentation CI job
CI: Deduplicate and template jobs
doc: search for dot as it's needed to build doxygen documentation
Update NEWS for 0.6.0
arm64: mc: NEON implementation of w_mask for 16 bpc
CI: run a selection of jobs on a node with avx2
x86: Fix crash in AVX2 cdef_filter with <32-byte stack alignment
arm64: mc: NEON implementation of blend for 16bpc
arm: mc: Optimize blend_v
arm64: mc: Treat the stride as a full 64 bit (potential signed) value in blend_8bpc_neon
arm64: mc: Fix indentation
arm64: mc: Use more intuitive lane specifications for loads/stores
Update NEWS for 0.6.0
CI/armv7: use `linux32 meson ...` to allow running on aarch64
arm64: loopfilter: NEON implementation of loopfilter for 16 bpc
arm: loopfilter: Prepare for 16 bpc
arm: loopfilter: Fix a comment
fuzzing: link the fuzzing binaries as C++
fuzzing: split the fuzzing targets to their own meson.build file
x86: Add mc w_mask 4:4:4 AVX-512 (Ice Lake) asm
x86: Add mc w_mask 4:2:2 AVX-512 (Ice Lake) asm
x86: Add mc w_mask 4:2:0 AVX-512 (Ice Lake) asm
x86: Add mc avg/w_avg/mask AVX-512 (Ice Lake) asm