ref: 0e38e5c4e74723b7b8c4eabd0e93c09ddf7eaa35
parent: 02e4bf6e9d9d836ff817b0e33fd6bf6b476ce738
author: volvet <[email protected]>
date: Thu Jan 9 11:59:07 EST 2014
add exception handler, the AMD cpu must be single core if it do not support HTT
--- a/codec/common/cpu.cpp
+++ b/codec/common/cpu.cpp
@@ -133,7 +133,11 @@
if( pNumberOfLogicProcessors != NULL ){
if (!strcmp((const str_t*)chVenderName, CPU_Vender_AMD)){
- *pNumberOfLogicProcessors = (uiFeatureB & 0x00ff0000) >> 16; // feature bits: 23-16 on returned EBX
+ if( uiCPU & WELS_CPU_HTT){
+ *pNumberOfLogicProcessors = (uiFeatureB & 0x00ff0000) >> 16; // feature bits: 23-16 on returned EBX
+ } else {
+ *pNumberOfLogicProcessors = 1;
+ }
} else if( !strcmp((const str_t*)chVenderName, CPU_Vender_INTEL) ){
uiFeatureC = 0;
WelsCPUId(0x4, &uiFeatureA, &uiFeatureB, &uiFeatureC, &uiFeatureD);