ref: 62351fa834571f6c7ab40d7a80458aefa6d7f6ce
parent: aa8c5f64d95d5ad0a36814ccee77a45467bda440
author: Jean-Marc Valin <[email protected]>
date: Thu Jun 19 12:16:07 EDT 2014
Whitespace fixes
--- a/celt/mips/celt_mipsr1.h
+++ b/celt/mips/celt_mipsr1.h
@@ -104,7 +104,7 @@
asm volatile("MADD $ac1, %0, %1" : : "r" ((int)MULT16_16_Q15(f,g10)), "r" ((int)x2));
asm volatile("MADD $ac1, %0, %1" : : "r" ((int)MULT16_16_Q15(f,g11)), "r" ((int)ADD32(x3,x1)));
asm volatile("MADD $ac1, %0, %1" : : "r" ((int)MULT16_16_Q15(f,g12)), "r" ((int)ADD32(x4,x0)));
-
+
asm volatile("EXTR.W %0,$ac1, %1" : "=r" (res): "i" (15));
y[i] = x[i] + res;
--- a/celt/mips/fixed_generic_mipsr1.h
+++ b/celt/mips/fixed_generic_mipsr1.h
@@ -124,4 +124,3 @@
}
#endif /* CELT_FIXED_GENERIC_MIPSR1_H */
-
--- a/celt/mips/pitch_mipsr1.h
+++ b/celt/mips/pitch_mipsr1.h
@@ -152,4 +152,3 @@
}
#endif /* PITCH_MIPSR1_H */
-
--- a/silk/fixed/mips/noise_shape_analysis_FIX_mipsr1.h
+++ b/silk/fixed/mips/noise_shape_analysis_FIX_mipsr1.h
@@ -334,4 +334,3 @@
}
RESTORE_STACK;
}
-
--- a/silk/fixed/mips/prefilter_FIX_mipsr1.h
+++ b/silk/fixed/mips/prefilter_FIX_mipsr1.h
@@ -134,7 +134,6 @@
if( lag > 0 ) {
for( i = 0; i < length; i++ ) {
-
/* unrolled loop */
silk_assert( HARM_SHAPE_FIR_TAPS == 3 );
idx = lag + LTP_shp_buf_idx;
--- a/silk/fixed/mips/warped_autocorrelation_FIX_mipsr1.h
+++ b/silk/fixed/mips/warped_autocorrelation_FIX_mipsr1.h
@@ -60,7 +60,6 @@
opus_int32 val;
val = 2 * QS - QC;
-
/* Order must be even */
silk_assert( ( order & 1 ) == 0 );
silk_assert( 2 * QS - QC >= 0 );
@@ -71,14 +70,13 @@
tmp1_QS = silk_LSHIFT32( (opus_int32)input[ n ], QS );
start_1 = tmp1_QS;
tmp3_QS = silk_LSHIFT32( (opus_int32)input[ n+1], QS );
- start_2 = tmp3_QS;
+ start_2 = tmp3_QS;
tmp5_QS = silk_LSHIFT32( (opus_int32)input[ n+2], QS );
- start_3 = tmp5_QS;
+ start_3 = tmp5_QS;
tmp7_QS = silk_LSHIFT32( (opus_int32)input[ n+3], QS );
/* Loop over allpass sections */
for( i = 0; i < order; i += 2 ) {
-
/* Output of allpass section */
tmp2_QS = silk_SMLAWB( state_QS[ i ], state_QS[ i + 1 ] - tmp1_QS, warping_Q16 );
corr_QC[ i ] = __builtin_mips_madd( corr_QC[ i ], tmp1_QS, start_1);
@@ -165,4 +163,3 @@
silk_assert( corr_QC[ 0 ] >= 0 ); /* If breaking, decrease QC*/
}
#endif /* __WARPED_AUTOCORRELATION_FIX_MIPSR1_H__ */
-
--- a/silk/fixed/noise_shape_analysis_FIX.c
+++ b/silk/fixed/noise_shape_analysis_FIX.c
@@ -449,4 +449,3 @@
RESTORE_STACK;
}
#endif /* OVERRIDE_silk_noise_shape_analysis_FIX */
-
--- a/silk/fixed/prefilter_FIX.c
+++ b/silk/fixed/prefilter_FIX.c
@@ -216,4 +216,3 @@
P->sLTP_shp_buf_idx = LTP_shp_buf_idx;
}
#endif /* OVERRIDE_silk_prefilt_FIX */
-
--- a/silk/mips/NSQ_del_dec_mipsr1.h
+++ b/silk/mips/NSQ_del_dec_mipsr1.h
@@ -403,4 +403,3 @@
}
#endif /* __NSQ_DEL_DEC_MIPSR1_H__ */
-
--- a/silk/mips/macros_mipsr1.h
+++ b/silk/mips/macros_mipsr1.h
@@ -8,7 +8,7 @@
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
-- Neither the name of Internet Society, IETF or IETF Trust, nor the
+- Neither the name of Internet Society, IETF or IETF Trust, nor the
names of specific contributors, may be used to endorse or promote
products derived from this software without specific prior written
permission.
@@ -32,7 +32,7 @@
#define mips_clz(x) __builtin_clz(x)
#undef silk_SMULWB
-static inline int silk_SMULWB(int a, int b)
+static inline int silk_SMULWB(int a, int b)
{
long long ac;
int c;
@@ -47,7 +47,7 @@
#define silk_SMLAWB(a32, b32, c32) ((a32) + silk_SMULWB(b32, c32))
#undef silk_SMULWW
-static inline int silk_SMULWW(int a, int b)
+static inline int silk_SMULWW(int a, int b)
{
long long ac;
int c;
@@ -59,7 +59,7 @@
}
#undef silk_SMLAWW
-static inline int silk_SMLAWW(int a, int b, int c)
+static inline int silk_SMLAWW(int a, int b, int c)
{
long long ac;
int res;
@@ -90,4 +90,3 @@
}
#endif /* __SILK_MACROS_MIPSR1_H__ */
-
--- a/silk/mips/sigproc_fix_mipsr1.h
+++ b/silk/mips/sigproc_fix_mipsr1.h
@@ -63,4 +63,3 @@
}
#endif /* SILK_SIGPROC_FIX_MIPSR1_H */
-