ref: 096f5d3769e3fffb8963cb05f6d190e7bd0da63d
parent: 05d3e794d7aeb24545424dc128c867f528a5bb00
author: Timothy B. Terriberry <[email protected]>
date: Sat Jun 18 06:05:57 EDT 2016
Remove tabs from source code. There are no tabs in source code.
--- a/celt/celt.h
+++ b/celt/celt.h
@@ -209,7 +209,7 @@
#endif
#ifndef OVERRIDE_COMB_FILTER_CONST
-# define comb_filter_const(y, x, T, N, g10, g11, g12, arch) \
+# define comb_filter_const(y, x, T, N, g10, g11, g12, arch) \
((void)(arch),comb_filter_const_c(y, x, T, N, g10, g11, g12))
#endif
--- a/celt/x86/pitch_sse.h
+++ b/celt/x86/pitch_sse.h
@@ -102,21 +102,21 @@
#if defined(OPUS_X86_PRESUME_SSE4_1) && defined(FIXED_POINT)
#define OVERRIDE_CELT_INNER_PROD
#define celt_inner_prod(x, y, N, arch) \
- ((void)arch, celt_inner_prod_sse4_1(x, y, N))
+ ((void)arch, celt_inner_prod_sse4_1(x, y, N))
#elif defined(OPUS_X86_PRESUME_SSE2) && defined(FIXED_POINT) && !defined(OPUS_X86_MAY_HAVE_SSE4_1)
#define OVERRIDE_CELT_INNER_PROD
#define celt_inner_prod(x, y, N, arch) \
- ((void)arch, celt_inner_prod_sse2(x, y, N))
+ ((void)arch, celt_inner_prod_sse2(x, y, N))
#elif defined(OPUS_X86_PRESUME_SSE) && !defined(FIXED_POINT)
#define OVERRIDE_CELT_INNER_PROD
#define celt_inner_prod(x, y, N, arch) \
- ((void)arch, celt_inner_prod_sse(x, y, N))
+ ((void)arch, celt_inner_prod_sse(x, y, N))
#elif ((defined(OPUS_X86_MAY_HAVE_SSE4_1) || defined(OPUS_X86_MAY_HAVE_SSE2)) && defined(FIXED_POINT)) || \
- (defined(OPUS_X86_MAY_HAVE_SSE) && !defined(FIXED_POINT))
+ (defined(OPUS_X86_MAY_HAVE_SSE) && !defined(FIXED_POINT))
extern opus_val32 (*const CELT_INNER_PROD_IMPL[OPUS_ARCHMASK + 1])(
const opus_val16 *x,
@@ -138,19 +138,19 @@
#undef comb_filter_const
void dual_inner_prod_sse(const opus_val16 *x,
- const opus_val16 *y01,
- const opus_val16 *y02,
- int N,
- opus_val32 *xy1,
- opus_val32 *xy2);
+ const opus_val16 *y01,
+ const opus_val16 *y02,
+ int N,
+ opus_val32 *xy1,
+ opus_val32 *xy2);
void comb_filter_const_sse(opus_val32 *y,
- opus_val32 *x,
- int T,
- int N,
- opus_val16 g10,
- opus_val16 g11,
- opus_val16 g12);
+ opus_val32 *x,
+ int T,
+ int N,
+ opus_val16 g10,
+ opus_val16 g11,
+ opus_val16 g12);
#if defined(OPUS_X86_PRESUME_SSE)
@@ -169,7 +169,7 @@
opus_val32 *xy1,
opus_val32 *xy2);
-#define dual_inner_prod(x, y01, y02, N, xy1, xy2, arch) \
+#define dual_inner_prod(x, y01, y02, N, xy1, xy2, arch) \
((*DUAL_INNER_PROD_IMPL[(arch) & OPUS_ARCHMASK])(x, y01, y02, N, xy1, xy2))
extern void (*const COMB_FILTER_CONST_IMPL[OPUS_ARCHMASK + 1])(
@@ -181,7 +181,7 @@
opus_val16 g11,
opus_val16 g12);
-#define comb_filter_const(y, x, T, N, g10, g11, g12, arch) \
+#define comb_filter_const(y, x, T, N, g10, g11, g12, arch) \
((*COMB_FILTER_CONST_IMPL[(arch) & OPUS_ARCHMASK])(y, x, T, N, g10, g11, g12))
#define NON_STATIC_COMB_FILTER_CONST_C
--- a/celt/x86/x86_celt_map.c
+++ b/celt/x86/x86_celt_map.c
@@ -72,7 +72,7 @@
#endif
#if (defined(OPUS_X86_MAY_HAVE_SSE4_1) && !defined(OPUS_X86_PRESUME_SSE4_1)) || \
- (!defined(OPUS_X86_MAY_HAVE_SSE_4_1) && defined(OPUS_X86_MAY_HAVE_SSE2) && !defined(OPUS_X86_PRESUME_SSE2))
+ (!defined(OPUS_X86_MAY_HAVE_SSE_4_1) && defined(OPUS_X86_MAY_HAVE_SSE2) && !defined(OPUS_X86_PRESUME_SSE2))
opus_val32 (*const CELT_INNER_PROD_IMPL[OPUS_ARCHMASK + 1])(
const opus_val16 *x,
--- a/celt/x86/x86cpu.c
+++ b/celt/x86/x86cpu.c
@@ -46,7 +46,7 @@
#include <intrin.h>
static _inline void cpuid(unsigned int CPUInfo[4], unsigned int InfoType)
{
- __cpuid((int*)CPUInfo, InfoType);
+ __cpuid((int*)CPUInfo, InfoType);
}
#else
--- a/configure.ac
+++ b/configure.ac
@@ -366,9 +366,9 @@
m4_define([DEFAULT_ARM_NEON_SOFTFP_INTR_CFLAGS], [-mfpu=neon -mfloat-abi=softfp])
AS_CASE([$host],
- [arm*hf*], [AS_VAR_SET([RESOLVED_DEFAULT_ARM_NEON_INTR_CFLAGS], "DEFAULT_ARM_NEON_INTR_CFLAGS")],
- [arm*eabi*], [AS_VAR_SET([RESOLVED_DEFAULT_ARM_NEON_INTR_CFLAGS], "DEFAULT_ARM_NEON_SOFTFP_INTR_CFLAGS")],
- [AS_VAR_SET([RESOLVED_DEFAULT_ARM_NEON_INTR_CFLAGS], "DEFAULT_ARM_NEON_INTR_CFLAGS")])
+ [arm*hf*], [AS_VAR_SET([RESOLVED_DEFAULT_ARM_NEON_INTR_CFLAGS], "DEFAULT_ARM_NEON_INTR_CFLAGS")],
+ [arm*eabi*], [AS_VAR_SET([RESOLVED_DEFAULT_ARM_NEON_INTR_CFLAGS], "DEFAULT_ARM_NEON_SOFTFP_INTR_CFLAGS")],
+ [AS_VAR_SET([RESOLVED_DEFAULT_ARM_NEON_INTR_CFLAGS], "DEFAULT_ARM_NEON_INTR_CFLAGS")])
AC_ARG_VAR([X86_SSE_CFLAGS], [C compiler flags to compile SSE intrinsics @<:@default=]DEFAULT_X86_SSE_CFLAGS[@:>@])
AC_ARG_VAR([X86_SSE2_CFLAGS], [C compiler flags to compile SSE2 intrinsics @<:@default=]DEFAULT_X86_SSE2_CFLAGS[@:>@])
@@ -702,7 +702,7 @@
]])],
[get_cpuid_by_asm="yes"
AC_MSG_RESULT([Inline Assembly])
- AC_DEFINE([CPU_INFO_BY_ASM], [1], [Get CPU Info by asm method])],
+ AC_DEFINE([CPU_INFO_BY_ASM], [1], [Get CPU Info by asm method])],
[AC_LINK_IFELSE([AC_LANG_PROGRAM([[
#include <cpuid.h>
]],[[
@@ -714,7 +714,7 @@
__get_cpuid(InfoType, &CPUInfo0, &CPUInfo1, &CPUInfo2, &CPUInfo3);
]])],
[AC_MSG_RESULT([C method])
- AC_DEFINE([CPU_INFO_BY_C], [1], [Get CPU Info by c method])],
+ AC_DEFINE([CPU_INFO_BY_C], [1], [Get CPU Info by c method])],
[AC_MSG_ERROR([no supported Get CPU Info method, please disable intrinsics])])])])
],
[