ref: 07418d9dd8c486c4b3842a4268b272ed6f1b9c54
parent: b880e9b415f39d83429330d1f3cb40d23ce7de98
author: Gregory Maxwell <[email protected]>
date: Tue Nov 27 07:51:20 EST 2012
Guard _BitScanReverse on MSVC so that MSVC 6 doesn't break. This also adds some extra casts to shut up compiler warnings reported on MSVC 6 where there is implicit truncation for the arguments of bitexact_cos(). Lacking access to CLZ/BSR will make the code a fair bit slower but that is better than failing to compile.
--- a/celt/bands.c
+++ b/celt/bands.c
@@ -923,8 +923,8 @@
fill &= ((1<<B)-1)<<B;
delta = 16384;
} else {
- imid = bitexact_cos(itheta);
- iside = bitexact_cos(16384-itheta);
+ imid = bitexact_cos((opus_int16)itheta);
+ iside = bitexact_cos((opus_int16)(16384-itheta));
/* This is the mid vs side allocation that minimizes squared error
in that band. */
delta = FRAC_MUL16((N-1)<<7,bitexact_log2tan(iside,imid));
--- a/celt/ecintrin.h
+++ b/celt/ecintrin.h
@@ -48,7 +48,7 @@
/*Count leading zeros.
This macro should only be used for implementing ec_ilog(), if it is defined.
All other code should use EC_ILOG() instead.*/
-#if defined(_MSC_VER)
+#if defined(_MSC_VER) && (_MSC_VER >= 1400)
# include <intrin.h>
/*In _DEBUG mode this is not an intrinsic by default.*/
# pragma intrinsic(_BitScanReverse)
--- a/celt/entcode.c
+++ b/celt/entcode.c
@@ -33,6 +33,11 @@
#include "arch.h"
#if !defined(EC_CLZ)
+/*This is a fallback for systems where we don't know how to access
+ a BSR or CLZ instruction (see ecintrin.h).
+ If you are optimizing Opus on a new platform and it has a native CLZ or
+ BZR (e.g. cell, MIPS, x86, etc) then making it available to Opus will be
+ an easy performance win.*/
int ec_ilog(opus_uint32 _v){
/*On a Pentium M, this branchless version tested as the fastest on
1,000,000,000 random 32-bit integers, edging out a similar version with