shithub: mc

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ref: e255cf8c55c5d2f7fda955b1edcc6e721edd021a
parent: 666f22f278c03138c337d734f8759194482d1d18
author: Ori Bernstein <[email protected]>
date: Wed Sep 25 09:11:23 EDT 2013

Floating point code now register allocates (Correctly?)

--- a/6/ra.c
+++ b/6/ra.c
@@ -41,29 +41,22 @@
 
 /* A map of which registers interfere */
 Reg regmap[][Nmode] = {
-    [0]  = {Rnone, Ral, Rax, Reax, Rrax},
-    [1]  = {Rnone, Rcl, Rcx, Recx, Rrcx},
-    [2]  = {Rnone, Rdl, Rdx, Redx, Rrdx},
-    [3]  = {Rnone, Rbl, Rbx, Rebx, Rrbx},
-    [4]  = {Rnone, Rsil, Rsi, Resi, Rrsi},
-    [5]  = {Rnone, Rdil, Rdi, Redi, Rrdi},
-    [6]  = {Rnone, Rr8b, Rr8w, Rr8d, Rr8},
-    [7]  = {Rnone, Rr9b, Rr9w, Rr9d, Rr9},
-    [8]  = {Rnone, Rr10b, Rr10w, Rr10d, Rr10},
-    [9]  = {Rnone, Rr11b, Rr11w, Rr11d, Rr11},
-    [10]  = {Rnone, Rr12b, Rr12w, Rr12d, Rr12},
-    [11]  = {Rnone, Rr13b, Rr13w, Rr13d, Rr13},
-    [12]  = {Rnone, Rr14b, Rr14w, Rr14d, Rr14},
-    [13]  = {Rnone, Rr15b, Rr15w, Rr15d, Rr15},
-    /* floating point */
-    [16]  = {Rnone, Rnone, Rnone, Rnone, Rnone, Rxmm0f, Rxmm0d},
-    [17]  = {Rnone, Rnone, Rnone, Rnone, Rnone, Rxmm1f, Rxmm1d},
-    [18]  = {Rnone, Rnone, Rnone, Rnone, Rnone, Rxmm2f, Rxmm2d},
-    [19]  = {Rnone, Rnone, Rnone, Rnone, Rnone, Rxmm3f, Rxmm3d},
-    [20]  = {Rnone, Rnone, Rnone, Rnone, Rnone, Rxmm4f, Rxmm4d},
-    [21]  = {Rnone, Rnone, Rnone, Rnone, Rnone, Rxmm5f, Rxmm5d},
-    [22]  = {Rnone, Rnone, Rnone, Rnone, Rnone, Rxmm6f, Rxmm6d},
-    [23]  = {Rnone, Rnone, Rnone, Rnone, Rnone, Rxmm7f, Rxmm7d},
+    [0]  = {Rnone, Ral, Rax, Reax, Rrax, Rxmm0f, Rxmm0d},
+    [1]  = {Rnone, Rcl, Rcx, Recx, Rrcx, Rxmm1f, Rxmm1d},
+    [2]  = {Rnone, Rdl, Rdx, Redx, Rrdx, Rxmm2f, Rxmm2d},
+    [3]  = {Rnone, Rbl, Rbx, Rebx, Rrbx, Rxmm3f, Rxmm3d},
+    [4]  = {Rnone, Rsil, Rsi, Resi, Rrsi, Rxmm4f, Rxmm4d},
+    [5]  = {Rnone, Rdil, Rdi, Redi, Rrdi, Rxmm5f, Rxmm5d},
+    [6]  = {Rnone, Rr8b, Rr8w, Rr8d, Rr8, Rxmm6f, Rxmm6d},
+    [7]  = {Rnone, Rr9b, Rr9w, Rr9d, Rr9, Rxmm7f, Rxmm7d},
+    [8]  = {Rnone, Rr10b, Rr10w, Rr10d, Rr10, Rxmm8f, Rxmm8d},
+    [9]  = {Rnone, Rr11b, Rr11w, Rr11d, Rr11, Rxmm9f, Rxmm9d},
+    [10]  = {Rnone, Rr12b, Rr12w, Rr12d, Rr12, Rxmm10f, Rxmm10d},
+    [11]  = {Rnone, Rr13b, Rr13w, Rr13d, Rr13, Rxmm11f, Rxmm11d},
+    [12]  = {Rnone, Rr14b, Rr14w, Rr14d, Rr14, Rxmm12f, Rxmm12d},
+    [13]  = {Rnone, Rr15b, Rr15w, Rr15d, Rr15, Rxmm13f, Rxmm13d},
+    [14]  = {Rnone, Rnone, Rnone, Rnone, Rnone, Rxmm14f, Rxmm14d},
+    [15]  = {Rnone, Rnone, Rnone, Rnone, Rnone, Rxmm15f, Rxmm15d},
 };
 
 /* Which regmap entry a register maps to */
--- a/test/float.myr
+++ b/test/float.myr
@@ -1,9 +1,10 @@
 use std
 
+const get42 = {
+	-> 42.0
+}
+
 /* basic sanity check on floating point operations. should return 84. */
 const main = {
-	/*
-	-> (42.0 + 42.0) castto(int)
-	*/
-	var v = 123.0
+	-> (42.0 + get42()) castto(int)
 }