ref: dae17beaf7e5c56c0362cd7c55ae817258b9e14c
parent: 9f97dc65e30625ccc6a87dfd1c2ae5914b50886e
author: Ori Bernstein <[email protected]>
date: Thu Dec 25 16:01:16 EST 2014
Get code to actually run on plan9.
Fuckin division and misnamed registers.
--- a/6/genp9.c
+++ b/6/genp9.c
@@ -450,7 +450,9 @@
hidden = "";
if (fn->isexport || streq(fn->name, Symprefix "main"))
hidden = "";
- fprintf(fd, "TEXT %s%s+0(SB),$%zd\n", fn->name, hidden, fn->stksz);
+ /* we don't use the stack size directive: myrddin handles
+ * the stack frobbing on its own */
+ fprintf(fd, "TEXT %s%s+0(SB),$0\n", fn->name, hidden);
for (j = 0; j < s->cfg->nbb; j++) {if (!s->bb[j])
continue;
--- a/6/insns.def
+++ b/6/insns.def
@@ -103,6 +103,26 @@
"\tDIV%T %R\n",
Use(.l={1},.r={Reax,Redx}), Def(.r={Reax,Redx}))+Insn(Iidiv,
+ "\tidiv%t %r\n",
+ "\tIDIV%T %R\n",
+ Use(.l={1},.r={Reax,Redx}),+ Def(.r={Reax,Redx}))+Insn(Icwd,
+ "\tcwd\n",
+ "\tCWD\n",
+ Use(.r={Reax}),+ Def(.r={Reax,Redx}))+Insn(Icdq,
+ "\tcdq\n",
+ "\tCDQ\n",
+ Use(.r={Reax}),+ Def(.r={Reax,Redx}))+Insn(Icqo,
+ "\tcqo\n",
+ "\tCQO\n",
+ Use(.r={Reax}),+ Def(.r={Reax,Redx}))Insn(Ineg,
"\tneg%t %r\n",
"\tNEG%T %R\n",
--- a/6/isel.c
+++ b/6/isel.c
@@ -531,12 +531,23 @@
b = newr(s, b);
c = coreg(Reax, mode(n));
r = locreg(a->mode);
- if (r->mode == ModeB)
- g(s, Ixor, eax, eax, NULL);
- else
- g(s, Ixor, edx, edx, NULL);
g(s, Imov, a, c, NULL);
- g(s, Idiv, b, NULL);
+ if (istysigned(exprtype(args[0]))) {+ switch (r->mode) {+ case ModeB: break;
+ case ModeW: g(s, Icwd, NULL); break;
+ case ModeL: g(s, Icdq, NULL); break;
+ case ModeQ: g(s, Icqo, NULL); break;
+ default: die("invalid mode in division"); break;+ }
+ g(s, Iidiv, b, NULL);
+ } else {+ if (r->mode == ModeB)
+ g(s, Ixor, eax, eax, NULL);
+ else
+ g(s, Ixor, edx, edx, NULL);
+ g(s, Idiv, b, NULL);
+ }
if (exprop(n) == Odiv)
d = coreg(Reax, mode(n));
else if (r->mode != ModeB)
--- a/6/regs.def
+++ b/6/regs.def
@@ -25,9 +25,9 @@
/* short regs */
Reg(Rax, "%ax", "AX", ModeW)
-Reg(Rbx, "%bx", "BX", ModeW)
Reg(Rcx, "%cx", "CX", ModeW)
Reg(Rdx, "%dx", "DX", ModeW)
+Reg(Rbx, "%bx", "BX", ModeW)
Reg(Rsi, "%si", "SI", ModeW)
Reg(Rdi, "%di", "DI", ModeW)
Reg(Rsp, "%sp", "SP", ModeW)
@@ -44,9 +44,9 @@
/* long regs */
Reg(Reax, "%eax", "AX", ModeL)
-Reg(Recx, "%ecx", "BX", ModeL)
-Reg(Redx, "%edx", "CX", ModeL)
-Reg(Rebx, "%ebx", "DX", ModeL)
+Reg(Recx, "%ecx", "CX", ModeL)
+Reg(Redx, "%edx", "DX", ModeL)
+Reg(Rebx, "%ebx", "BX", ModeL)
Reg(Resi, "%esi", "SI", ModeL)
Reg(Redi, "%edi", "DI", ModeL)
Reg(Resp, "%esp", "SP", ModeL)
@@ -62,9 +62,9 @@
/* quad regs */
Reg(Rrax, "%rax", "AX", ModeQ)
-Reg(Rrcx, "%rcx", "BX", ModeQ)
-Reg(Rrdx, "%rdx", "CX", ModeQ)
-Reg(Rrbx, "%rbx", "DX", ModeQ)
+Reg(Rrcx, "%rcx", "CX", ModeQ)
+Reg(Rrdx, "%rdx", "DX", ModeQ)
+Reg(Rrbx, "%rbx", "BX", ModeQ)
Reg(Rrsi, "%rsi", "SI", ModeQ)
Reg(Rrdi, "%rdi", "DI", ModeQ)
Reg(Rrsp, "%rsp", "SP", ModeQ)
@@ -114,4 +114,4 @@
Reg(Rxmm14d, "%xmm14", "X14", ModeD)
Reg(Rxmm15d, "%xmm15", "X15", ModeD)
-Reg(Rrip, "%rip", "PC", ModeQ)
+Reg(Rrip, "%rip", "IP", ModeQ)
--- a/libstd/syswrap+plan9-x64.myr
+++ b/libstd/syswrap+plan9-x64.myr
@@ -86,11 +86,31 @@
const fork = {; -> sys.rfork(sys.Rffdg | sys.Rfrend | sys.Rfproc) castto(pid)} const execv = {cmd, args; -> sys.exec(cmd, args) castto(int64)} const execve = {cmd, args, env; -> sys.exec(cmd, args) castto(int64)}-const exit = {status;+const digitchars = "0123456789"
+const exit = {status+ var buf : byte[32] /* big enough for exit status numbers */
+ var n, i, idx
+
if status == 0
+ sys.pwrite(1, "exit(0)ing\n", -1)
sys.exits("")else
- sys.exits("failure")+ status &= 255
+ i = 100
+ n = 0
+ sys.pwrite(1, "...formatting\n", -1)
+ while i > 0
+ if i > status
+ continue
+ ;;
+ idx = (status/i)
+ idx %= 10
+ buf[n++] = digitchars[idx];
+ i /= 10
+ ;;
+ sys.pwrite(1, "done...", -1)
+ sys.pwrite(1, buf[:n], -1)
+ sys.exits(buf[:n])
;;
}
--- a/libstd/util+plan9-x64.s
+++ b/libstd/util+plan9-x64.s
@@ -10,17 +10,17 @@
*/
TEXT sys$cstring+0(SB),$0
/* save registers */
- SUBQ $48,SP
- MOVQ BP,40(SP)
MOVQ SP,BP
- MOVQ R15,32(SP)
- MOVQ SI,24(SP)
- MOVQ DI,16(SP)
- MOVQ CX,8(SP)
+ SUBQ $48,SP
+ MOVQ BP,-8(BP)
+ MOVQ R15,-16(BP)
+ MOVQ SI,-24(BP)
+ MOVQ DI,-32(BP)
+ MOVQ CX,-40(BP)
- MOVQ 8(BP),R15 /* ret addr */
- MOVQ 16(BP),SI /* src */
- MOVQ 24(BP),CX /* len */
+ MOVQ (BP),R15 /* ret addr */
+ MOVQ 8(BP),SI /* src */
+ MOVQ 16(BP),CX /* len */
SUBQ CX,SP /* get stack */
SUBQ $1,SP /* +1 for nul */
@@ -30,29 +30,29 @@
ANDQ $(~15),SP /* align */
CLD
- REP; MOVSB
+ REP
+ MOVSB
MOVB $0,(DI) /* terminate */
- MOVQ R15,0(SP) /* ret addr */
-
/* Restore registers */
- MOVQ -32(BP),CX
- MOVQ -24(BP),DI
- MOVQ -16(BP),SI
- MOVQ -8(BP),R15
- MOVQ (BP),BP
+ MOVQ R15,0(SP) /* place ret addr */
+ MOVQ -40(BP),CX
+ MOVQ -32(BP),DI
+ MOVQ -24(BP),SI
+ MOVQ -16(BP),R15
+ MOVQ -8(BP) ,BP
RET
TEXT sys$alloca+0(SB),$0
/* save registers */
+ MOVQ SP,BP
SUBQ $32,SP
- MOVQ BP,24(SP)
- MOVQ SP,BP
- MOVQ R15,16(SP)
- MOVQ BX,8(SP)
+ MOVQ BP,-8(BP)
+ MOVQ R15,-16(BP)
+ MOVQ BX,-24(SP)
- MOVQ 8(BP),R15 /* ret addr */
- MOVQ 16(BP),BX /* len */
+ MOVQ (BP),R15 /* ret addr */
+ MOVQ 8(BP),BX /* len */
/* get stack space */
SUBQ BX,SP /* get stack space */
@@ -60,12 +60,11 @@
SUBQ $16,SP /* "unpop" the args for return */
ANDQ $(~15),SP /* align */
- MOVQ R15,0(SP) /* ret addr */
-
+ MOVQ R15,0(SP) /* place ret addr */
/* restore registers */
- MOVQ -16(BP),BX
- MOVQ -8(BP),R15
- MOVQ (BP),BP
+ MOVQ -16(BP),R15
+ MOVQ -24(SP),BX
+ MOVQ -8(BP),BP
RET
GLOBL sys$tosptr+0(SB),$8
--- a/test/runtest.sh
+++ b/test/runtest.sh
@@ -24,6 +24,16 @@
NFAILED=$[$NFAILED + 1]
}
+function expectstatus {+ ./$1 $3
+ if [ $? -eq $2 ]; then
+ pass $1
+ return
+ else
+ fail $1
+ fi
+}
+
function expectprint {if [ "`./$1 $3`" != "$2" ]; then
fail $1