ref: d20ac61f136fd03b34d0ca1272760a7fa19fa2e7
parent: 25fc2ab09e3ff0ede5615be44e534c567327e6a6
author: Ori Bernstein <[email protected]>
date: Mon Aug 19 09:16:40 EDT 2013
Add all SSE registers.
--- a/6/ra.c
+++ b/6/ra.c
@@ -93,6 +93,14 @@
[Rxmm5f] = 21, [Rxmm5d] = 21,
[Rxmm6f] = 22, [Rxmm6d] = 22,
[Rxmm7f] = 23, [Rxmm7d] = 23,
+ [Rxmm8f] = 24, [Rxmm8d] = 24,
+ [Rxmm9f] = 25, [Rxmm9d] = 25,
+ [Rxmm10f] = 26, [Rxmm10d] = 26,
+ [Rxmm11f] = 27, [Rxmm11d] = 27,
+ [Rxmm12f] = 28, [Rxmm12d] = 28,
+ [Rxmm13f] = 29, [Rxmm13d] = 29,
+ [Rxmm14f] = 30, [Rxmm14d] = 30,
+ [Rxmm15f] = 31, [Rxmm15d] = 31,
};
/* %esp, %ebp are not in the allocatable pool */
--- a/6/regs.def
+++ b/6/regs.def
@@ -85,6 +85,14 @@
Reg(Rxmm5f, "%xmm5", ModeF)
Reg(Rxmm6f, "%xmm6", ModeF)
Reg(Rxmm7f, "%xmm7", ModeF)
+Reg(Rxmm8f, "%xmm8", ModeF)
+Reg(Rxmm9f, "%xmm9", ModeF)
+Reg(Rxmm10f, "%xmm10", ModeF)
+Reg(Rxmm11f, "%xmm11", ModeF)
+Reg(Rxmm12f, "%xmm12", ModeF)
+Reg(Rxmm13f, "%xmm13", ModeF)
+Reg(Rxmm14f, "%xmm14", ModeF)
+Reg(Rxmm15f, "%xmm15", ModeF)
/* double precision floating point registers */
Reg(Rxmm0d, "%xmm0", ModeD)
@@ -95,6 +103,14 @@
Reg(Rxmm5d, "%xmm5", ModeD)
Reg(Rxmm6d, "%xmm6", ModeD)
Reg(Rxmm7d, "%xmm7", ModeD)
+Reg(Rxmm8d, "%xmm8", ModeD)
+Reg(Rxmm9d, "%xmm9", ModeD)
+Reg(Rxmm10d, "%xmm10", ModeD)
+Reg(Rxmm11d, "%xmm11", ModeD)
+Reg(Rxmm12d, "%xmm12", ModeD)
+Reg(Rxmm13d, "%xmm13", ModeD)
+Reg(Rxmm14d, "%xmm14", ModeD)
+Reg(Rxmm15d, "%xmm15", ModeD)
Reg(Rrip, "%rip", ModeQ)
Reg(Rrsp, "%rsp", ModeQ)