shithub: mc

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ref: 8b39fba2b9ed0619abea27eddd129d7b2c8c8178
parent: 96cb5ec50175acc33b6f67ae4690e9ef9badaffa
author: Ori Bernstein <[email protected]>
date: Tue Jun 18 13:52:24 EDT 2013 

Add floating point registers to the allocator.


--- a/6/isel.c
+++ b/6/isel.c
@@ -23,13 +23,13 @@
 #undef Insn
 };
 
-char modenames[] = {
-  [ModeB] = 'b',
-  [ModeW] = 'w',
-  [ModeL] = 'l',
-  [ModeQ] = 'q',
-  [ModeF] = 'f',
-  [ModeD] = 'd'
+char* modenames[] = {
+  [ModeB] = "b",
+  [ModeW] = "w",
+  [ModeL] = "l",
+  [ModeQ] = "q",
+  [ModeF] = "ss",
+  [ModeD] = "sd"
 };
 
 /* forward decls */
@@ -745,7 +745,7 @@
                     modeidx = strtol(p, &p, 10) - 1;
 
                 if (*p == 't')
-                    fputc(modenames[insn->args[modeidx]->mode], fd);
+                    fputs(modenames[insn->args[modeidx]->mode], fd);
                 else
                     die("Invalid %%-specifier '%c'", *p);
                 break;
--- a/6/ra.c
+++ b/6/ra.c
@@ -55,6 +55,15 @@
     [11]  = {Rnone, Rr13b, Rr13w, Rr13d, Rr13},
     [12]  = {Rnone, Rr14b, Rr14w, Rr14d, Rr14},
     [13]  = {Rnone, Rr15b, Rr15w, Rr15d, Rr15},
+    /* floating point */
+    [16]  = {Rnone, Rnone, Rnone, Rnone, Rnone, Rxmm0f, Rxmm0d},
+    [17]  = {Rnone, Rnone, Rnone, Rnone, Rnone, Rxmm1f, Rxmm1d},
+    [18]  = {Rnone, Rnone, Rnone, Rnone, Rnone, Rxmm2f, Rxmm2d},
+    [19]  = {Rnone, Rnone, Rnone, Rnone, Rnone, Rxmm3f, Rxmm3d},
+    [20]  = {Rnone, Rnone, Rnone, Rnone, Rnone, Rxmm4f, Rxmm4d},
+    [21]  = {Rnone, Rnone, Rnone, Rnone, Rnone, Rxmm5f, Rxmm5d},
+    [22]  = {Rnone, Rnone, Rnone, Rnone, Rnone, Rxmm6f, Rxmm6d},
+    [23]  = {Rnone, Rnone, Rnone, Rnone, Rnone, Rxmm7f, Rxmm7d},
 };
 
 /* Which regmap entry a register maps to */
@@ -122,6 +131,26 @@
     [Rr13] = 11,
     [Rr14] = 12,
     [Rr15] = 13,
+
+    /* float */
+    [Rxmm0f] = 16,
+    [Rxmm1f] = 17,
+    [Rxmm2f] = 18,
+    [Rxmm3f] = 19,
+    [Rxmm4f] = 20,
+    [Rxmm5f] = 21,
+    [Rxmm6f] = 22,
+    [Rxmm7f] = 23,
+
+    /* double */
+    [Rxmm0d] = 16,
+    [Rxmm1d] = 17,
+    [Rxmm2d] = 18,
+    [Rxmm3d] = 19,
+    [Rxmm4d] = 20,
+    [Rxmm5d] = 21,
+    [Rxmm6d] = 22,
+    [Rxmm7d] = 23,
 };
 
 /* %esp, %ebp are not in the allocatable pool */
@@ -758,7 +787,7 @@
     size_t nml;
     size_t idx;
     Loc *v;
-    
+
     nml = nodemoves(s, u->reg.id, &ml);
     for (i = 0; i < nml; i++) {
         m = ml[i];
--- a/6/regs.def
+++ b/6/regs.def
@@ -76,6 +76,26 @@
 Reg(Rr14, "%r14", ModeQ)
 Reg(Rr15, "%r15", ModeQ)
 
+/* floating point registers */
+Reg(Rxmm0f, "%xmm0", ModeF)
+Reg(Rxmm1f, "%xmm1", ModeF)
+Reg(Rxmm2f, "%xmm2", ModeF)
+Reg(Rxmm3f, "%xmm3", ModeF)
+Reg(Rxmm4f, "%xmm4", ModeF)
+Reg(Rxmm5f, "%xmm5", ModeF)
+Reg(Rxmm6f, "%xmm6", ModeF)
+Reg(Rxmm7f, "%xmm7", ModeF)
+
+/* double precision floating point registers */
+Reg(Rxmm0d, "%xmm0", ModeD)
+Reg(Rxmm1d, "%xmm1", ModeD)
+Reg(Rxmm2d, "%xmm2", ModeD)
+Reg(Rxmm3d, "%xmm3", ModeD)
+Reg(Rxmm4d, "%xmm4", ModeD)
+Reg(Rxmm5d, "%xmm5", ModeD)
+Reg(Rxmm6d, "%xmm6", ModeD)
+Reg(Rxmm7d, "%xmm7", ModeD)
+
 Reg(Rrip, "%rip", ModeQ)
 Reg(Rrsp, "%rsp", ModeQ)
 Reg(Rrbp, "%rbp", ModeQ)