ref: 5257df69de2bf48496ec82b4a515f118ac17a25b
parent: 55f902cc327c45e15fba898fcc004f01a2f187e3
author: Ori Bernstein <[email protected]>
date: Thu Sep 17 03:21:20 EDT 2015
Fix SSE instruction formats on Amd64
--- a/6/insns.def
+++ b/6/insns.def
@@ -251,12 +251,12 @@
Def(.l={2}))
Insn(Icvttsd2si,
"\tcvttsd2si%2t %x,%r\n",
- "\tCVTTSD2S%2T %X,%R\n",
+ "\tCVTTS%T2S%2T %X,%R\n",
Use(.l={1}),
Def(.l={2}))
Insn(Icvttsi2sd,
"\tcvtsi2s%2t %x,%f\n",
- "\tCVTTS%2T2SD %X,%F\n",
+ "\CVTS%T2S%2T %X,%F\n",
Use(.l={1}),
Def(.l={2}))
Insn(Icvttsd2ss,
--- a/6/mkfile
+++ b/6/mkfile
@@ -20,7 +20,7 @@
LIB=../parse/libparse.a ../mi/libmi.a
-HFILES=asm.h ../parse/parse.h ../mi/mi.h ../config.h
+HFILES=asm.h ../parse/parse.h ../mi/mi.h ../config.h insns.def regs.def
BIN=/$objtype/bin
</sys/src/cmd/mkone