shithub: mc

Download patch

ref: 3f183eeb7fa732ae7cdd87aa4399db38e57f6445
parent: 08ce974ecaf47306a203be10b2247fc2e0b22113
author: Ori Bernstein <[email protected]>
date: Tue Jul 31 13:38:54 EDT 2012

Move call results out of %eax

--- a/6/insns.def
+++ b/6/insns.def
@@ -54,8 +54,8 @@
 Insn(Isetge,    "\tsetge %v\n",                 Use(),  Def(.l={1}))
 
 /* branch instructions */
-Insn(Icall,     "\tcall %v\n",                  Use(.l={1}), Def())
-Insn(Icallind,  "\tcall *%v\n",                 Use(.l={1}), Def())
+Insn(Icall,     "\tcall %v\n",                  Use(.l={1}), Def(.r={Rrax}))
+Insn(Icallind,  "\tcall *%v\n",                 Use(.l={1}), Def(.r={Rrax}))
 Insn(Ijmp,      "\tjmp %v\n",                   Use(.l={1}), Def())
 Insn(Ijz,       "\tjz %v\n",                    Use(.l={1}), Def())
 Insn(Ijnz,      "\tjnz %v\n",                   Use(.l={1}), Def())
--- a/6/isel.c
+++ b/6/isel.c
@@ -358,19 +358,23 @@
 
 static Loc *gencall(Isel *s, Node *n)
 {
-    Loc *src, *dst, *arg, *fn;   /* values we reduced */
-    Loc *rax, *rsp;       /* hard-coded registers */
+    Loc *src, *dst, *arg, *fn;  /* values we reduced */
+    Loc *rax, *rsp, *ret;       /* hard-coded registers */
     Loc *stkbump;        /* calculated stack offset */
     int argsz, argoff;
     size_t i;
 
     rsp = locphysreg(Rrsp);
-    if (tybase(exprtype(n))->type == Tyvoid)
+    if (tybase(exprtype(n))->type == Tyvoid) {
         rax = NULL;
-    else if (stacktype(exprtype(n)))
+        ret = NULL;
+    } else if (stacktype(exprtype(n))) {
         rax = locphysreg(Rrax);
-    else
+        ret = locreg(ModeQ);
+    } else {
         rax = coreg(Rrax, mode(n));
+        ret = locreg(mode(n));
+    }
     argsz = 0;
     /* Have to calculate the amount to bump the stack
      * pointer by in one pass first, otherwise if we push
@@ -407,7 +411,9 @@
         g(s, Icallind, fn, NULL);
     if (argsz)
         g(s, Iadd, stkbump, rsp, NULL);
-    return rax;
+    if (rax)
+        g(s, Imov, rax, ret, NULL);
+    return ret;
 }
 
 Loc *selexpr(Isel *s, Node *n)
@@ -572,6 +578,7 @@
             break;
         case Otrunc:
             a = selexpr(s, args[0]);
+            a = inr(s, a);
             r = locreg(mode(n));
             g(s, Imov, a, r, NULL);
             break;
@@ -892,6 +899,10 @@
     is.globls = globls;
     is.ret = fn->ret;
     is.cfg = fn->cfg;
+    /* ensure that all physical registers have a loc created, so we
+     * don't get any surprises referring to them in the allocator */
+    for (i = 0; i < Nreg; i++)
+        locphysreg(i);
 
     for (i = 0; i < fn->cfg->nbb; i++)
         lappend(&is.bb, &is.nbb, mkasmbb(fn->cfg->bb[i]));
--- a/6/ra.c
+++ b/6/ra.c
@@ -559,6 +559,11 @@
 {
     regid t;
 
+    /* Regs of different modes can't be combined as things stand.
+     * In principle they should be combinable, but it confused the
+     * whole mode dance. */
+    if (locmap[u]->mode != locmap[v]->mode)
+        return 0;
     /* if u isn't prepainted, can we conservatively coalesce? */
     if (!bshas(s->prepainted, u) && conservative(s, u, v))
         return 1;