ref: 0bcd350aa42cb4fa53f759fe333d194cd15e1246
parent: ded3b7ca9b2ea1612b714b6b5d31579f73c63dd1
author: Ori Bernstein <[email protected]>
date: Thu Jun 14 23:00:49 EDT 2012
A correct igraph setting function. We now have an igraph that isn't wrong all the time.
--- a/8/asm.h
+++ b/8/asm.h
@@ -117,7 +117,6 @@
Loc *stksz;
/* register allocator state */
- Bitset *initial; /* locations that need to be a specific colour */
Bitset *prepainted; /* locations that need to be a specific colour */
size_t *gbits; /* igraph matrix repr */
--- a/8/ra.c
+++ b/8/ra.c
@@ -65,6 +65,16 @@
[Rebp] = 5,
};
+/* %esp, %ebp are not in the allocatable pool */
+static int isfixreg(Loc *l)
+{
+ if (l->reg.colour == Resp)
+ return 1;
+ if (l->reg.colour == Rebp)
+ return 1;
+ return 0;
+}
+
static size_t uses(Insn *insn, long *u)
{
size_t i, j;
@@ -81,7 +91,8 @@
k = usetab[insn->op].l[i] - 1;
/* non-registers are handled later */
if (insn->args[k]->type == Locreg)
- u[j++] = insn->args[k]->reg.id;
+ if (!isfixreg(insn->args[k]))
+ u[j++] = insn->args[k]->reg.id;
}
/* some insns don't reflect their defs in the args.
* These are explictly listed in the insn description */
@@ -97,9 +108,11 @@
m = insn->args[i];
if (m->type != Locmem && m->type != Locmeml)
continue;
- u[j++] = m->mem.base->reg.id;
+ if (!isfixreg(m->mem.base))
+ u[j++] = m->mem.base->reg.id;
if (m->mem.idx)
- u[j++] = m->mem.idx->reg.id;
+ if (!isfixreg(m->mem.base))
+ u[j++] = m->mem.idx->reg.id;
}
return j;
}
@@ -118,7 +131,8 @@
break;
k = deftab[insn->op].l[i] - 1;
if (insn->args[k]->type == Locreg)
- d[j++] = insn->args[k]->reg.id;
+ if (!isfixreg(insn->args[k]))
+ d[j++] = insn->args[k]->reg.id;
}
/* some insns don't reflect their defs in the args.
* These are explictly listed in the insn description */
@@ -200,23 +214,26 @@
{
size_t i;
i = (maxregid * v) + u;
- return s->gbits[i/Sizetbits] & (1ULL <<(i % Sizetbits));
+ return (s->gbits[i/Sizetbits] & (1ULL <<(i % Sizetbits))) != 0;
}
static void gbputedge(Isel *s, size_t u, size_t v)
{
size_t i, j;
- i = (maxregid * v) + u;
- j = (maxregid * u) + v;
+
+ i = (maxregid * u) + v;
+ j = (maxregid * v) + u;
s->gbits[i/Sizetbits] |= 1ULL <<(i % Sizetbits);
s->gbits[j/Sizetbits] |= 1ULL <<(j % Sizetbits);
+ assert(gbhasedge(s, u, v) && gbhasedge(s, v, u));
}
static void addedge(Isel *s, size_t u, size_t v)
{
- if (u == v)
+ if (u == v || gbhasedge(s, u, v))
return;
gbputedge(s, u, v);
+ gbputedge(s, v, u);
if (!bshas(s->prepainted, u)) {
bsput(s->gadj[u], v);
s->degree[u]++;
@@ -328,6 +345,8 @@
/* FIXME: inefficient. Do I care? */
count = 0;
+ if (pil)
+ *pil = NULL;
for (i = 0; i < s->nrmoves[n]; i++) {
for (j = 0; j < s->nmactive; j++) {
if (s->mactive[j] == s->rmoves[n][i]) {
@@ -395,8 +414,8 @@
s->degree[n]--;
if (d == K) {
- adj = adjacent(s, m);
- enablemove(s, m);
+ enablemove(s, n);
+ adj = adjacent(s, n);
for (m = 0; bsiter(adj, &m); m++)
enablemove(s, n);
bsfree(adj);