shithub: rgbds

Download patch

ref: ca6fa6d1d728ed0b4312aa4f8bcf8e47a7475814
parent: fcd37b52b69fc652427cc8216a9a20c04143cc87
author: ISSOtm <[email protected]>
date: Wed Jul 22 10:59:43 EDT 2020

Split register-indirect tokens

This allows whitespace between the brackets and the register.
This also fixes #531

Note that `$ff00 + c` is still treated as a single token, because trying to
use an expression on the left side causes a shift/reduce conflict.
This isn't great, but most people seem to be either used to it as-is, or
using the new `ldh a, [c]` syntax.
If this causes problems with a lexer rewrite, it'll be deprecated; but for
now, keep it around, as the support is clunky but bearable.

--- a/src/asm/asmy.y
+++ b/src/asm/asmy.y
@@ -628,11 +628,11 @@
 
 %token	T_TOKEN_A T_TOKEN_B T_TOKEN_C T_TOKEN_D T_TOKEN_E T_TOKEN_H T_TOKEN_L
 %token	T_MODE_AF
-%token	T_MODE_BC T_MODE_BC_IND
-%token	T_MODE_DE T_MODE_DE_IND
+%token	T_MODE_BC
+%token	T_MODE_DE
 %token	T_MODE_SP
-%token	T_MODE_C_IND
-%token	T_MODE_HL T_MODE_HL_IND T_MODE_HL_INDDEC T_MODE_HL_INDINC
+%token	T_MODE_HW_C
+%token	T_MODE_HL T_MODE_HL_DEC T_MODE_HL_INC
 %token	T_CC_NZ T_CC_Z T_CC_NC
 
 %type	<nConstValue>	reg_r
@@ -1653,18 +1653,18 @@
 		}
 ;
 
-z80_ldi		: T_Z80_LDI T_MODE_HL_IND ',' T_MODE_A {
+z80_ldi		: T_Z80_LDI '[' T_MODE_HL ']' ',' T_MODE_A {
 			out_AbsByte(0x02 | (2 << 4));
 		}
-		| T_Z80_LDI T_MODE_A ',' T_MODE_HL_IND {
+		| T_Z80_LDI T_MODE_A ',' '[' T_MODE_HL ']' {
 			out_AbsByte(0x0A | (2 << 4));
 		}
 ;
 
-z80_ldd		: T_Z80_LDD T_MODE_HL_IND ',' T_MODE_A {
+z80_ldd		: T_Z80_LDD '[' T_MODE_HL ']' ',' T_MODE_A {
 			out_AbsByte(0x02 | (3 << 4));
 		}
-		| T_Z80_LDD T_MODE_A ',' T_MODE_HL_IND {
+		| T_Z80_LDD T_MODE_A ',' '[' T_MODE_HL ']' {
 			out_AbsByte(0x0A | (3 << 4));
 		}
 ;
@@ -1681,14 +1681,18 @@
 			out_AbsByte(0xE0);
 			out_RelByte(&$2);
 		}
-		| T_Z80_LDIO T_MODE_A ',' T_MODE_C_IND {
+		| T_Z80_LDIO T_MODE_A ',' c_ind {
 			out_AbsByte(0xF2);
 		}
-		| T_Z80_LDIO T_MODE_C_IND ',' T_MODE_A {
+		| T_Z80_LDIO c_ind ',' T_MODE_A {
 			out_AbsByte(0xE2);
 		}
 ;
 
+c_ind		: '[' T_MODE_C ']'
+		| '[' T_MODE_HW_C ']'
+;
+
 z80_ld		: z80_ld_mem
 		| z80_ld_cind
 		| z80_ld_rr
@@ -1733,7 +1737,7 @@
 		}
 ;
 
-z80_ld_cind	: T_Z80_LD T_MODE_C_IND ',' T_MODE_A {
+z80_ld_cind	: T_Z80_LD c_ind ',' T_MODE_A {
 			out_AbsByte(0xE2);
 		}
 ;
@@ -1755,7 +1759,7 @@
 		}
 ;
 
-z80_ld_a	: T_Z80_LD reg_r ',' T_MODE_C_IND {
+z80_ld_a	: T_Z80_LD reg_r ',' c_ind {
 			if ($2 == REG_A)
 				out_AbsByte(0xF2);
 			else
@@ -1995,7 +1999,7 @@
 		| T_MODE_E		{ $$ = REG_E; }
 		| T_MODE_H		{ $$ = REG_H; }
 		| T_MODE_L		{ $$ = REG_L; }
-		| T_MODE_HL_IND		{ $$ = REG_HL_IND; }
+		| '[' T_MODE_HL ']'	{ $$ = REG_HL_IND; }
 		| T_MODE_A		{ $$ = REG_A; }
 ;
 
@@ -2011,10 +2015,18 @@
 		| T_MODE_SP		{ $$ = REG_SP; }
 ;
 
-reg_rr		: T_MODE_BC_IND		{ $$ = REG_BC_IND; }
-		| T_MODE_DE_IND		{ $$ = REG_DE_IND; }
-		| T_MODE_HL_INDINC	{ $$ = REG_HL_INDINC; }
-		| T_MODE_HL_INDDEC	{ $$ = REG_HL_INDDEC; }
+reg_rr		: '[' T_MODE_BC ']'	{ $$ = REG_BC_IND; }
+		| '[' T_MODE_DE ']'	{ $$ = REG_DE_IND; }
+		| hl_ind_inc		{ $$ = REG_HL_INDINC; }
+		| hl_ind_dec		{ $$ = REG_HL_INDDEC; }
+;
+
+hl_ind_inc	: '[' T_MODE_HL_INC ']'
+		| '[' T_MODE_HL T_OP_ADD ']'
+;
+
+hl_ind_dec	: '[' T_MODE_HL_DEC ']'
+		| '[' T_MODE_HL T_OP_SUB ']'
 ;
 
 %%
--- a/src/asm/globlex.c
+++ b/src/asm/globlex.c
@@ -395,21 +395,15 @@
 	/* Handled in list of registers */
 	/* { "c", T_TOKEN_C }, */
 
-	{"[bc]", T_MODE_BC_IND},
-	{"[de]", T_MODE_DE_IND},
-	{"[hl]", T_MODE_HL_IND},
-	{"[hl+]", T_MODE_HL_INDINC},
-	{"[hl-]", T_MODE_HL_INDDEC},
-	{"[hli]", T_MODE_HL_INDINC},
-	{"[hld]", T_MODE_HL_INDDEC},
+	{"hli", T_MODE_HL_INC},
+	{"hld", T_MODE_HL_DEC},
+	{"$ff00+c", T_MODE_HW_C},
+	{"$ff00 + c", T_MODE_HW_C},
 	{"af", T_MODE_AF},
 	{"bc", T_MODE_BC},
 	{"de", T_MODE_DE},
 	{"hl", T_MODE_HL},
 	{"sp", T_MODE_SP},
-	{"[c]", T_MODE_C_IND},
-	{"[$ff00+c]", T_MODE_C_IND},
-	{"[$ff00 + c]", T_MODE_C_IND},
 
 	{"a", T_TOKEN_A},
 	{"b", T_TOKEN_B},
--- a/test/link/all-instructions.asm
+++ b/test/link/all-instructions.asm
@@ -155,6 +155,8 @@
     ld  [$ABCD],a
     ldh [$ff00+$DB],a
     ld  [$ff00+c],a
+    ld  [$ff00 + c],a
+    ldh [c],a
 
     ld  a,[bc]
     ld  a,[de]
@@ -162,11 +164,17 @@
     ld  a,[$ABCD]
     ldh a,[$ff00+$DB]
     ld  a,[$ff00+c]
+    ld  a,[$ff00 + c]
+    ldh a,[c]
 
     ld  [hl+],a
+    ld  [hli],a
     ld  [hl-],a
+    ld  [hld],a
     ld  a,[hl+]
+    ld  a,[hli]
     ld  a,[hl-]
+    ld  a,[hld]
 
     ; Jumps and Subroutines
 
binary files a/test/link/all-instructions.out.bin b/test/link/all-instructions.out.bin differ