The full GB-Z80 instruction-set is implemented with a few modifications to the original Zilog syntax. This is due to a Bison problem but in my opinion the syntax is better than the original one.

Instructions

    ADC
    ADD
    AND
    BIT
    CALL
    CCF
    CP
    CPL
    DAA
    DEC
    DI
    EI
    EX
    HALT
    INC
    JP
    JR
    LD
    LDD
    LDI
    LDH/LDIO    (see note below)
    NOP
    OR
    POP
    PUSH
    RES
    RET
    RETI
    RL
    RLA
    RLC
    RLCA
    RR
    RRA
    RRC
    RRCA
    RST
    SBC
    SCF
    SET
    SLA
    SRA
    SRL
    STOP
    SUB
    SWAP
    XOR

Note that you can use both

    OR   A,B
    OR   B

Addressingmodes

Indirect addressing has been changed to [ ] instead of ( ):

    A
    B
    C
    D
    E
    H
    L
    AF
    BC
    DE
    HL
    SP
    [BC]
    [DE]
    [HL]
    [HL-]/[HLI]
    [HL+]/[HLD]
    [SP]
    n8       (8 bit expression)
    n16      (16 bit expression)
    n3       (3 bit CONSTANT expression)
    [n16]/[$FF00+n8]
    [$FF00+C]/[C]

The assembler will intelligently decide between [n16] and [$FF00+n8] in the LD instruction. Note however that if you use any constant symbols in the expression they had better be defined before the instruction or your symbol-table may become mangled. Also worth noting is that it will only ever select the short $FF00 mode when you use constant symbols. NOT if you use symbols defined in a HRAM section. As this defies the whole point of implementing the HRAM sectiontype I've added the LDIO mnemonic. It works like the LD instruction but it will ALWAYS generate the $FF00+ form and it will also automatically logically AND the expression with $FF if it is relocatable. Which is what you want. Trust me ;)

Conditioncodes

    C
    NC
    Z
    NZ