ref: bc60b85785e7557a0d49f0fc121648fcc3ec2765
parent: 9d0203a4ee2f2e21e5aca614776fc47574e59b00
author: Anthony J. Bentley <[email protected]>
date: Sat Feb 21 22:33:18 EST 2015
Support BANK() correctly when given WRAMX/SRAM/VRAM labels. (Mostly) from Antonio Niño Díaz.
--- a/src/asm/asmy.y
+++ b/src/asm/asmy.y
@@ -1073,7 +1073,7 @@
}
} else if ($4 == SECT_WRAMX) {
if ($8 >= 1 && $8 <= 7) {
- out_NewAbsSection($2, $4, -1, $8);
+ out_NewAbsSection($2, $4, -1, $8 - 1);
} else {
yyerror("WRAMX bank value $%x out of range (1 to 7)", $8);
}
@@ -1110,7 +1110,7 @@
} else if ($4 == SECT_WRAMX) {
if ($6 >= 0 && $6 < 0x10000) {
if ($11 >= 1 && $11 <= 7) {
- out_NewAbsSection($2, $4, $6, $11);
+ out_NewAbsSection($2, $4, $6, $11 - 1);
} else {
yyerror("WRAMX bank value $%x out of range (1 to 7)", $11);
}
--- a/src/link/patch.c
+++ b/src/link/patch.c
@@ -3,6 +3,7 @@
#include <string.h>
#include "extern/err.h"
+#include "link/assign.h"
#include "link/mylink.h"
#include "link/symbol.h"
#include "link/main.h"
@@ -53,18 +54,28 @@
SLONG
getsymbank(SLONG symid)
{
+ SLONG nBank;
+
switch (pCurrentSection->tSymbols[symid]->Type) {
- case SYM_IMPORT:
- return (sym_GetBank(pCurrentSection->tSymbols[symid]->pzName));
+ case SYM_IMPORT:
+ nBank = sym_GetBank(pCurrentSection->tSymbols[symid]->pzName);
break;
case SYM_EXPORT:
case SYM_LOCAL:
- return (pCurrentSection->tSymbols[symid]->pSection->nBank);
- //return (pCurrentSection->nBank);
- default:
+ nBank = pCurrentSection->tSymbols[symid]->pSection->nBank;
break;
+ default:
+ errx(1, "*INTERNAL* UNKNOWN SYMBOL TYPE");
}
- errx(1, "*INTERNAL* UNKNOWN SYMBOL TYPE");
+
+ if (nBank >= BANK_WRAMX && nBank <= (BANK_WRAMX+6))
+ return nBank - BANK_WRAMX + 1;
+ if (nBank >= BANK_VRAM && nBank <= (BANK_VRAM+1))
+ return nBank - BANK_VRAM;
+ if (nBank >= BANK_SRAM && nBank <= (BANK_SRAM+3))
+ return nBank - BANK_SRAM;
+
+ return nBank;
}
SLONG
--- /dev/null
+++ b/test/link/ram-bank-numbers.asm
@@ -1,0 +1,36 @@
+; this should generate a rom consisting of the following bytes:
+; 01 02 03 04 05 06 07 00 01 02 03 00 01
+
+section "x",rom0
+ db bank(w1),bank(w2),bank(w3),bank(w4),bank(w5),bank(w6),bank(w7)
+ db bank(s0),bank(s1),bank(s2),bank(s3)
+ db bank(v0),bank(v1)
+
+section "wa",wramx,bank[1]
+w1:
+section "wb",wramx,bank[2]
+w2:
+section "wc",wramx,bank[3]
+w3:
+section "wd",wramx,bank[4]
+w4:
+section "we",wramx,bank[5]
+w5:
+section "wf",wramx,bank[6]
+w6:
+section "wg",wramx,bank[7]
+w7:
+
+section "sa",sram,bank[0]
+s0:
+section "sb",sram,bank[1]
+s1:
+section "sc",sram,bank[2]
+s2:
+section "sd",sram,bank[3]
+s3:
+
+section "v00",vram,bank[0]
+v0:
+section "v01",vram,bank[1]
+v1: